Low level access to processors using the AArch64 execution state.

Overview

crates.io crates.io

aarch64-cpu

Low level access to processors using the AArch64 execution state.

Usage

Please note that for using this crate's register definitions (as provided by aarch64_cpu::registers::*), you need to also include tock-registers in your project. This is because the interface traits provided by tock-registers are implemented by this crate. You should include the same version of tock-registers as is being used by this crate to ensure sane interoperatbility.

For example, in the following snippet, X.Y.Z should be the same version of tock-registers that is mentioned in aarch64-cpu's Cargo.toml.

[package]
name = "Your embedded project"

# Some parts omitted for brevity.

[dependencies]
tock-registers = "X.Y.Z"
aarch64-cpu = "A.B.C"       # <-- Includes tock-registers itself.

Example

Check out https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials for usage examples. Listed below is a snippet of rust-raspberrypi-OS-tutorials's early boot code.

use aarch64_cpu::{asm, registers::*};
use tock_registers::interfaces::Writeable; // <-- Trait needed to use `write()` and `set()`.

// Some parts omitted for brevity.

unsafe fn prepare_el2_to_el1_transition(
    virt_boot_core_stack_end_exclusive_addr: u64,
    virt_kernel_init_addr: u64,
) {
    // Enable timer counter registers for EL1.
    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);

    // No offset for reading the counters.
    CNTVOFF_EL2.set(0);

    // Set EL1 execution state to AArch64.
    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);

    // Set up a simulated exception return.
    SPSR_EL2.write(
        SPSR_EL2::D::Masked
            + SPSR_EL2::A::Masked
            + SPSR_EL2::I::Masked
            + SPSR_EL2::F::Masked
            + SPSR_EL2::M::EL1h,
    );
}

Disclaimer

Descriptive comments in the source files are taken from the ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile.

License

Licensed under either of

at your option.

Contribution

Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.

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Comments
  • enable everything on stable toolchain

    enable everything on stable toolchain

    I'd like to be able to use the registers with stable Rust, and as far as I can tell, there was nothing really in the library that actually required nightly.

    Is it reasonable to just remove the nightly requirement like this?

    opened by ccbrown 3
Releases(v9.3.1)
  • v9.3.1(Dec 31, 2022)

    What's Changed

    • Set CPACR_EL1 register for Readable and Writeable by @retrage in https://github.com/rust-embedded/aarch64-cpu/pull/4

    New Contributors

    • @retrage made their first contribution in https://github.com/rust-embedded/aarch64-cpu/pull/4

    Full Changelog: https://github.com/rust-embedded/aarch64-cpu/compare/v9.3.0...v9.3.1

    Source code(tar.gz)
    Source code(zip)
  • v9.3.0(Dec 26, 2022)

    What's Changed

    • add debug data transfer registers by @ccbrown in https://github.com/rust-embedded/aarch64-cpu/pull/3
    • Bump copyright dates by @andre-richter in https://github.com/rust-embedded/aarch64-cpu/commit/89ad9ec8340975865309c1b2abf27c87240f9c1c

    Full Changelog: https://github.com/rust-embedded/aarch64-cpu/compare/v9.2.0...v9.3.0

    Source code(tar.gz)
    Source code(zip)
  • v9.2.0(Dec 7, 2022)

    What's Changed

    • Add VBAR_EL3 register and SCR_EL3 fields by @ccbrown in https://github.com/rust-embedded/aarch64-cpu/pull/2

    Full Changelog: https://github.com/rust-embedded/aarch64-cpu/compare/v9.1.0...v9.2.0

    Source code(tar.gz)
    Source code(zip)
  • v9.1.0(Dec 6, 2022)

    What's Changed

    • enable everything on stable toolchain by @ccbrown in https://github.com/rust-embedded/aarch64-cpu/pull/1

    New Contributors

    • @ccbrown made their first contribution in https://github.com/rust-embedded/aarch64-cpu/pull/1

    Full Changelog: https://github.com/rust-embedded/aarch64-cpu/compare/v9.0.0...v9.1.0

    Source code(tar.gz)
    Source code(zip)
  • v9.0.0(Nov 6, 2022)

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